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參數資料
| 型號： | AD8019ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | DSL Line Driver with Power-Down |
| 中文描述： | DUAL LINE DRIVER, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數： | 8/20頁 |
| 文件大小： | 782K |
| 代理商： | AD8019ARU |
REV. 0
AD8019
–8–
1000
FREQUENCY
–
MHz
–
90
1
P
–
100
10
–
80
–
70
–
60
–
50
–
40
–
30
0.1
0.01
–
20
–
10
–
PSRR
+PSRR
TPC 19. PSRR vs. Frequency; R
L
= 100
1000
FREQUENCY
–
kHz
1
100
10
0.1
0.01
–
I
NOISE
V
NOISE
+I
NOISE
V
N
–
1
10
100
0.1
100
10
1
0.1
I
N
–
TPC 20. Noise vs. Frequency
20ns/DIV
2
V
IN
V
OUT
1.1k
1.1k
V
IN
V
OUT
50
50
50
6.8pF
TPC 21. Settling Time 0.1%; V
S
=
±
12 V, R
L
= 100
,
V
OUT
= 2 V p-p
1000
FREQUENCY
–
MHz
–
90
1
C
–
100
10
–
80
–
70
–
60
–
50
–
40
–
30
0.1
0.01
–
20
–
100
TPC 22. Crosstalk vs. Frequency, V
S
=
±
12 V, V
S
=
±
6 V;
G = +2; V
IN
= 10 dBm
FREQUENCY
–
MHz
–
20
0.001
G
–
0
0.01
1000
0.1
1
10
100
–
10
10
20
30
40
50
60
70
80
90
100
110
120
2k
50
10
500
10
50
50
50
50
A
OL
PHASE
–
45
P
–
0
45
90
135
180
225
270
TPC 23. Open-Loop Gain and Phase vs. Frequency
V
IN
20ns/DIV
2
1.1k
1.1k
V
IN
V
OUT
50
50
50
6.8pF
V
OUT
TPC 24. Settling Time 0.1%; V
S
=
±
6 V, R
L
= 100
,
V
OUT
= 2 V p-p
相關PDF資料 |
PDF描述 |
|---|---|
| AD8019AR-EVAL | DSL Line Driver with Power-Down |
| AD8019AR-REEL | DSL Line Driver with Power-Down |
| AD802-155BR | Clock Recovery and Data Retiming Phase-Locked Loop |
| AD802-155KR | Clock Recovery and Data Retiming Phase-Locked Loop |
| AD8021 | Low Noise, High Speed Amplifier for 16-Bit Systems |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD8019ARU-EVAL | 制造商:Analog Devices 功能描述:Evaluation Board For DSL Line Driver With Power-Down |
| AD8019ARU-REEL | 制造商:Analog Devices 功能描述:ADSL Driver Dual 180MHz 14-Pin TSSOP T/R 制造商:Analog Devices 功能描述:ADSL DRVR DUAL 180MHZ 14TSSOP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:TSSOP DSL LINE DRIVER WITH POWER DOWN - Tape and Reel |
| AD8019ARUZ | 制造商:Analog Devices 功能描述:ADSL Driver Dual 180MHz 14-Pin TSSOP |
| AD8019ARZ | 制造商:Analog Devices 功能描述:ADSL Driver Dual 180MHz 8-Pin SOIC N |
| AD802 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AD800/AD802: Clock Recovery and Data Retiming Phase-Locked Loop Data Sheet (Rev. B. 12/93) |
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