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參數資料
型號: MC33593
廠商: Motorola, Inc.
英文描述: PLL Tuned UHF Receiver for Data Transfer Applications
中文描述: 鎖相環調諧UHF接收器的數據傳輸應用
文件頁數: 11/28頁
文件大小: 681K
代理商: MC33593
N
Go to: www.freescale.com
revision 7.0, 5 February 2002
Motorola, Inc., 2002.
CONFIGURATION REGISTERS
Table 4 describes the
Configuration Register 1
(CR1).
Table 4: Configuration Register 1
bit 7
bit 6
bit 5
R/W
CF
MOD
1
1
0
- R/W controls the 3 registers access (read or write):
0 = Write CR1, CR2 ,CR3,
1 = Read CR1, CR2, CR3.
- CF defines the Carrier Frequency as shown onTable 5.
Table 5: Carrier Frequency selection
CF
Selected Frequency
0
Not allowed
1
868MHz
- MOD sets the data Modulation type:
0 = On/Off Keying (OOK) modulation,
1 = Frequency Shift Keying (FSK) modulation.
- SOE enables the Strobe Oscillator:
0 = Disabled,
1 = Enabled,
Whatever SOE value has been programmed, a high level on STROBE sets the circuit into run mode.
- SR0/SR1 define the Strobe Ratio (SR) as shown on Table 6. SR is the ratio Sleep time over Run time and
Run time=T
Strobe
(where T
Strobe
is the Strobe oscillator period).
Table 6: Strobe Ratio selection
SR1
SR0
0
0
0
1
1
0
1
1
- DME enables the Data Manager:
0 = Disabled,
1 = Enabled.
Data are output on MOSI and the associated clock on SCLK.
- HE defines if a Header word is present (the bit HE is only active if DME=1):
0 = No header,
1 = Header.
Configuration Register 2
(CR2) defines the Identifier (ID) word content. The bits will be Manchester coded.
Table 7: Configuration Register 2
bit 7
bit 6
bit 5
Bit name
ID7
ID6
ID5
Reset value
0
0
0
Table 8 describes the
Configuration Register 3
(CR3).
Table 8: Configuration Register 3
bit 7
bit 6
bit 5
DR1
DR0
MG
1
0
0
bit 4
SOE
1
bit 3
SR1
0
bit 2
SR0
1
bit 1
DME
0
bit 0
HE
0
Bit name
Reset value
Strobe Ratio
3
7
15
31
bit 4
ID4
0
bit 3
ID3
0
bit 2
ID2
0
bit 1
ID1
0
bit 0
ID0
0
bit 4
MS
0
bit 3
PG
0
bit 2
-
0
bit 1
-
0
bit 0
-
0
Bit name
Reset value
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
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